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IC INDUSTRY AWARDS PREVIEW 53
has been developed to give the continuous
via sidewall coverage needed for the
plating step.
The Versalis fxP system allows R&D
users to link processes in a way that
would not be possible on traditionally
configured single process systems. On the
Versalis fxP, users can link separate
processes without breaking vacuum to
discover potential performance benefits,
and then apply those findings to optimally
configure production tools.
Aviza sees 3D-ICs as a growth market
to enable smaller factor devices (such as
PCs, PDAs, mobile phones and other
consumer products) with increased
functionality and improved electrical
performance. By leveraging the
company’s process expertise in the areas
of etch, PVD and CVD, they believe that
Versalis fxP offers a unique solution to The development of this novel system The NSX quickly and accurately detects
the R&D community focusing on 3D-ICs was driven by the emerging 3D yield inhibiting defects, providing quality
and TSV technology. On one platform, Interconnect (3D IC) applications based assurance and valuable process
customers can develop their TSV on Silicon TSV (Through Silicon Via) information. This information may be
processes in a cost effective and efficient technologies. This new milestone in transferred to yield management
manner with the ability to seamlessly photoresist application will enable users programs, including Rudolph's DMS
migrate these processes to the production to carry out further lithography steps at Decision software and fabwide
environment. Packaging is a cost driven the bottom of vias to create through DMSVision software for further analysis
activity and Versalis fxP significantly cuts wafer interconnects and allow a new and review, reducing manufacturing costs
R&D CapEx over traditionally configured bandwidth of applications throughout and time to market.
single use equipment. Aviza has already many technologies in Semiconductor Overview New NSX 100: High
shipped a Versalis fxP tool carrying etch processing markets. throughput inspection for 200 mm
& CVD modules and is seeing significant While the coating of vertical features applications automated, 100% advanced
interest for Versalis fxPs from Advanced is common practice in MEMS technology, macro defect inspection.
Packaging houses, foundries and IDMs for it has also recently been adopted in Fast, consistent 2D bump inspection
the integration of etch, CVD & PVD emerging packaging applications based on provides process and defect information
technologies. TSV technology, used in the advanced for enhanced process control and product
packaging and interconnect arenas. Vias consistency
are used to interconnect the active front Features an easy to use Windows
side of the wafer to the backside and based user interface.
further on to the pins of the specific wafer Time tested applications in
level package. This coating technology semiconductor, optoelectronics, wafer
was first realised by EVG on their bumping, data storage, micro
EVG100 series coating equipment by electromechanical systems (MEMS) and
development and integration of new spray micro display markets.
EV GROUP (EVG)
technology and techniques.
www.evgroup.com
First systems have been installed at
MATECH
major customers and are being used to
www.matech.com
manufacture CMOS Imaging Sensor
150 NANOSPRAY COATING
(CIS) packages based on TSV technology. WaveEtch
SYSTEM
● Designed for fully automated high
RUDOLPH TECHNOLOGY
MATECH’s WaveEtch systems is unique
topography spray coating.
SYSTEMS
because of the new capabilities they bring
● Patent pending spray coating
www.rudolphtech.com to the wet processing toolset of the
technique for coating very small and deep semiconductor and photovoltaic industry.
patterns
The NSX Series
These new capabilities include the
● Unique spray process that is based ability to texture surfaces using wet
on a spray mist created by ultrasonic The NSX Series is a high throughput and processes, the ability to clean, thin, etch,
nozzles repeatable macro defect inspection and stress relief conventional as well as
● Significant improvement in refined solution used throughout the device ultra thin wafers (50 um and below),
dispense and targeted positioning of the manufacturing process. Macro defects inherent single sidedness, reduced
spray stream (defects 0.5 micron and larger) can be chemical usage and reduced
● Supports wafers up to 300 mm created during wafer manufacturing, environmental impact. The WaveEtch
diameter probing, bumping, dicing, or by general systems can also wet process very thin
● Homogenous coatings of features handling, and can have a major impact on wafers that are distorted or warped. All
300µm deep and 100µm diameter the quality of a microelectronic device. this wet processing power is embodied in
July 2008
www.euroasiasemiconductor.com
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