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IC INDUSTRY AWARDS PREVIEW 33
vectors for test equipment and provides
fault analysis and root cause failure
guidance based on silicon test results.
Virage Logic’s STAR Yield
Accelerator has capabilities and benefits
VIRAGE LOGIC CORPORATION
that address the needs of test, product,
www.viragelogic.com and process engineers using the STAR
Memory System. Automation support for conventional physical de-processing and
Self-Test and Repair (STAR) Yield verification and vector generation manual analysis, the STAR Yield
Accelerator provides value to all design and test Accelerator can pinpoint the exact
engineers implementing the STAR physical location of memory faults and
Virage Logic's Self-Test and Repair Memory System for memory test and provide guidance of the root cause. By
(STAR) Yield Accelerator, announced on repair. Automation to easily enable silicon enabling engineers to troubleshoot yield
October 22, 2007, is a new option debug through embedded memories is an issues in a secure and efficient manner,
available for the STAR Memory System, essential capability for test and product the STAR Yield Accelerator protects both
Virage Logic’s industry-leading embedded engineers to quickly and easily identify manufacturers’ sensitive process data and
test and repair solution. The STAR Yield and isolation silicon related issues. the designers’ closely guarded design
Accelerator provides a complete solution Automation to aid in failure trend data.
for automated silicon verification, vector analysis is a value added capability for
generation, silicon analysis, and yield any company that is shipping high volume
ramping of embedded memories. products or any silicon manufacturer that
Integrated with the industry leading is producing a high volume of wafers. The
STAR Memory System embedded test and ability to even incrementally improve
repair solution, the STAR Yield yield can dramatically impact
Accelerator bridges the design and profitability.
manufacturing disciplines to enable The STAR Yield Accelerator is proven
automated test vector generation, silicon to dramatically reduce silicon time to-
analysis, fault isolation and classification test, time to product bring up, and time to
VISTEC SEMICONDUCTOR
to be used at the critical semiconductor volume production. Through preliminary
SYSTEMS GMBH
tape out, bring up and volume engagements with several key
manufacturing stages, dramatically semiconductor customers at 90nm, 65nm,
www.vistec-semi.com
reducing silicon time to test, time to and 55nm process nodes, the STAR Yield
product bring up, and time to volume Accelerator has demonstrated its ability LMS IPRO4
production. to meet design requirements of integrated
The STAR Yield Accelerator family of device manufacturers (IDM), fabless and LMS IPRO4 is a fully automated mask
products consists of the STAR Verifier, foundry customers. metrology system. It is capable of
STAR Vector Generator, STAR Debugger, The STAR Yield Accelerator rapidly, measurement registration (overlay on
and STAR Yield Analyser, which can be cost effectively and accurately identifies, reticles) as well as critical dimensions
licensed separately or in a package. analyses, isolates, and classifies memory (CD) in transmitted light or in reflected
Leveraging the infrastructure of the faults as designs are readied for transition light at i-line (365nm).
STAR Memory System, the STAR Yield from first silicon to volume The LMS IPRO4 is designed to
Accelerator automatically generates manufacturing. By automating this support mask metrology requirements of
process within the existing development the 45nm node. The system is famous for
workflow, STAR Yield Accelerator works its measurement performance and
with the STAR Memory System to speed reliability, for its straight forward user
system on chip (SoC) time to volume and interface and its comprehensive data
The IC Industry
dramatically boost yield percentages. The evaluation software.
STAR Yield Accelerator can reduce The LMS IPRO4 can be equipped with
silicon bring up by months, reducing an optional 300mm wafer chuck in order
Awards 2008 will be
overall time to volume production. to qualify thoroughly pattern placement
STAR Yield Accelerator’s verifier, of any wafer lithography tool, either
vector generator, and debugger scanners or direct write e-beam systems.
presented at
components automatically generate The system is equipped with a 904 nm
vectors for test equipment and provide infrared laser auto focus (LAF) diode. It
fault analysis and root cause failure is used in conjunction with a TV autofocus
SEMICON Europa guidance based on silicon test results. system for obtaining edge intensity
Using STAR Yield Accelerator, profiles and ultimately edge locations in a
in Stuttgart on
manufacturers can rapidly and directly quality that has not been possible ever
analyse failures manifested in embedded before: Experimentally measured
memories and inspect the physical positions of structures as small as 0.13
7th October
location and class of each fault to micron showed excellent results.
determine the root cause without
involving the intellectual property (IP) Superb Mechanics:
vendor or SoC designers. One of the main assets of the LMS IPRO4
Offering capabilities far beyond is the stage. The LMS IPRO4 measures
July 2008
www.euroasiasemiconductor.com
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