IC Industry Awards Preview 2009
without the need for high alignment and placement tools.
temperature compression techniques Ziptronix has demonstrated 3-micron
that can lower yields and raise and 1.5-micron pitch interconnects
processing costs. using existing alignment tools.
A key feature in Ziptronix's technology is Ziptronix's 3D IC technology is available
the ability to use nickel as for license to OEMs/IDMs, such
a DBI metal that reliably interconnects as manufacturers of high-performance
to copper, tungsten or aluminum imaging systems and sensor arrays,
TSVs, while providing for adequate mobile electronics, consumer electronics
planarity of the oxide/metal and portable gaming systems; to
interface to achieve a strong, reliable foundries seeking to implement TSV
bond. This process supports technology and to OSATs (Outsourced
both backside and frontside Semiconductor Assembly & Test)
interconnects, and resolves the vendors.
Winner: Final Manufacturing
fundamental problem of non-planar
Best Tool 2008
Issue IV 2009
surface depression (dishing), that Ziptronix is providing the final part of
square4
Agilent Technologies
typically occurs with copper. the equation - a high throughput, low
www.agilent.com
.com
temperature oxide bond technology
The Ziptronix DBI process can be that achieves a metal connection
implemented for face-to-face or without requiring a low throughput, high semiconductor supply chain.
back-to-face configurations in wafer-to- temperature thermal compression. Ziptronix 3D IC technology enables
wafer or chip-to-wafer formats wafers to be bonded at low
to achieve high density 3D interconnects Ziptronix 3D integration technology can temperatures, with out the need for
(up to 108/cm2) and is scalable be implemented at the OEM/IDM, expensive alignment tools or
oasiasemiconductor
to sub 1-micron pitch with improved foundry, or OSAT level of the pressure/thermal chambers.
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