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News Main v Final DR 18/12/08 10:50 Page 7
NEWS DESK
7
MOSIS announces IBM’s SOI technology
THE MOSIS SERVICE announced the improvement, typically 30%, when devices by having access to this leading
availability of multiple project wafer compared to bulk silicon. Power reduction edge semiconductor process in low
(MPW) low volume fabrication services gain is in the range of 40%. volumes.
using IBM’s sixth generation silicon on Deputy director of MOSIS, Wes Multiple designs are aggregated onto
insulator (SOI) 12SO technology. System Hansford, commented, “As the industry’s one mask set allowing customers to share
on chip designers (SoC) requiring first 45nm SOI process, this energy the overhead costs associated with mask
integration, high speed and low power saving SOI process is suitable for a broad creation, fabrication and assembly.”
consumption will now have access to the range of consumer electronics A Cadence design kit including CAD
45 nanometre CMOS SOI process. Aimed applications such as digital TVs and high tool support files, DRC and LVS decks,
at large SoC applications requiring a high end mobile applications. By using our and simulation files are available. Design
gate count, the SOI technology provides MPW services, organisations can rules, process specifications and SPICE
low leakage and higher performance dramatically reduce the cost of sampling parameters are also provided.
Semiconductor equipment spending
to fall to six year low in 2009
FOLLOWING a dismal 2008, global
spending on semiconductor manufacturing
equipment in 2009 will fall to its lowest
level in six years according to iSuppli
Corp. iSuppli anticipates that worldwide
capital spending by chip makers on
semiconductor manufacturing equipment
in 2009 will decline to $35.2 billion,
down 17.6% from 2008. This will mark
the lowest level of spending since 2003,
when semiconductor capital spending
amounted to $33.8 billion.
The decline in 2009 revenue will
extend the downturn seen in 2008.
Through the first three quarters of 2008,
capital expenditures were down by 15.3%
compared to the same period in 2007.
iSuppli anticipates that by the end of
2008, capital expenditures will fall to ‘At the start of the second quarter, spend at historical rates. However, by the
$42.7 billion, down 21.1% from $54 semiconductor equipment providers were end of the third quarter, market demand
billion in 2007. still reeling from the sharp cuts in capital virtually stopped as global uncertainty
While the market for semiconductor expenditures from the major memory chip driven by the threat of the collapse of the
manufacturing gear was already showing suppliers,’ said Len Jelinek, director and financial markets threw consumers into a
signs of weakness in the second quarter of chief analyst for semiconductor tailspin. Companies throughout the
2008, the extent of the market manufacturing at iSuppli. ‘Because of electronic supply chain began to report
vulnerability really became apparent as this, capital expenditures in 2008 already declining sales and falling profits. The
the worldwide economic and financial were depressed, with virtually no impact on semiconductor manufacturing
crises flared up in the third quarter. semiconductor supplier continuing to was immediately apparent, with falling
factory utilisations and significant
reductions in capital spending, especially
PI receives US patent
for capacity expansions.’
While the semiconductor industry as a
PI (Physik Instrumente), a dynamic applications, addressing key whole remained in an overcapacity at the
manufacturer of piezo actuators and lifetime mechanisms common to other start of the second quarter of 2008, there
precision motion control equipment has piezoelectric actuators. remained a strong potential to achieve
received a United States patent for its For more information, see U.S. supply/demand equilibrium with just a
development of innovative multilayer Patent No. 7,449,077 ‘Method for the modest increase in demand. Because of
ceramic actuators. PI’s exclusive production of monolithic multilayer this, semiconductor suppliers and chip
PICMA piezo ceramic actuators are actuator made of a piezo-ceramic or equipment makers were looking forward
based on the novel stress reduction and electro-strictive material and external to 2009 with the anticipation of modest
encapsulation technologies which electrical contact for a monolithic growth. Leading edge chip manufacturers
increases longevity both in static and multilayer actuator.’ were rushing toward the 28/30 nanometre
process technology nodes.
December 2008 / January 2009 www.euroasiasemiconductor.com
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