EVG Cover Story v Final_DR 18/12/08 10:48 Page 17
COVER STORY
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involves processing the device wafer on the front side. The less than $190 per wafer, a feat accomplished more than a year
carrier wafer or/and the device wafer is coated with a spin-on ahead of the consortium’s original goal to bring TSV line CoO to
adhesive, and both wafers are then transferred to a bond under $200 per wafer by the end of 2009. This target,
chamber, where they are centred and vacuum bonded. Following established through collaboration with experts from throughout
temporary bonding, backside processes (thinning, etching, the packaging industry, was developed to make TSV competitive
metallisation, etc.) are applied to the wafer stack, and the thin with existing packaging technology, while delivering significant
device wafer is then de-bonded from the carrier wafer. form factor and performance improvements. As this cost model
The two main classes of intermediate materials for temporary clearly shows that reducing via size will enable lower CoO, EMC-
bonding are spin-on adhesives and laminated tape. The 3D is next focused on further shrinking per wafer costs to $145.
intermediate material enables the maximum subsequent process
steps and allows the widest range of parameters. The choice of Into the future
intermediate material depends on three key characteristics: At the end of this decade, TSV will become the new standard for
chemical resistance, maximum operating temperature and memory packaging, DRAM and flash, while the beginning of the
thermal budget, and high vacuum/high temperature capability. next decade will see the first examples of TSV integrated
For commercially available adhesives, there are three classes devices, such as stacked memory on logic packages. Memory
of de-bonding release mechanisms: thermal, ultraviolet (UV) and devices, CMOS image sensors and MEMS have been the first to
chemical. The main disadvantage of chemical release is that the pursue TSV for next generation packaging, especially for use in
thin wafer floats uncontrolled in a solvent bath after de-bonding, consumer products.
which is usually incompatible with the thin wafers needed for Looking ahead, several key areas are emerging as drivers,
TSV integration. With thermal release, the release temperature including 300 mm and larger wafers, which have unique
is higher than the maximum operating temperature, which is requirements due to their size, weight and high value, and the
often incompatible with the devices’ thermal budget. And UV next wave of 3D/TSV technologies beyond CMOS image sensors.
release materials require a transparent carrier wafer, which not With an eye toward these requirements, as well as its customers’
only increases the cost but also creates a situation whereby the roadmaps, which are typically even more stringent than those put
device and carrier wafer have different thermal expansion forth in the ITRS, EVG continues to work on accelerating
properties, resulting in a bowed or warped stack. Moreover, the existing bonding schemes.
thick carrier wafer can dominate the thermal expansion Over the past two years, the maximum heating ramp has been
behaviour of the whole stack. doubled, from 30
o
C to 60
o
C per minute, enabling 30% higher
throughput, while alignment specifications have tightened to
Partnering key to continued success enable very high density interconnects, i.e., 3 to 5 micron bond
Technology advancements cannot be developed or promoted in a pads, which, although not needed today, are essential to the
vacuum, but must evolve out of co-operative relationships with future scaleability of 3D.
customers and partners whose technologies help create high At the same time, the company is collaborating with
value solutions that will benefit the industry as a whole. As an customers and partners to develop new bonding methods that
example, EV Group and Brewer Science have developed a fully will allow throughput to exceed 20 bonds per hour, further
integrated temporary bonding process designed to overcome improving customer time to market. These ongoing
existing tape based and wax based adhesives’ limitations. The developments and other investments in the industry’s future
process utilises Brewer Science’s thermoplast based WaferBOND create a vital strategy for continued growth and success, for
HT temporary adhesive material on EV Group’s fully automated EVG and for the industry as a whole.
EVG850TB/DB temporary bonding/de-bonding cluster platform,
enabling creation of a homogeneous bond that uniformly covers
and encapsulates the device wafer’s topography.
Another prime example of EV Group’s commitment to this
concept is its efforts in the area of TSVs. EVG was an early
pioneer in TSV, having worked in this area with Rensselaer
Polytechnic Institute (RPI) and Massachusetts Institute of
Technology (MIT) in the late 1990s. In 2006, the company
leveraged this expertise to co-create the EMC-3D Consortium,
chartered with implementation of a cost effective TSV process
for 3D chip stacking and MEMS integration. The consortium
currently counts among its members more then 15 equipment
and materials companies, and research organisations, each of
which contributes its expertise in a variety of areas relevant to Figure 3. Typical process flow for carrier based, thin wafer
advancing TSV technology and speeding its adoption. handling involves a temporary bonding step prior to
Earlier this year, EMC-3D announced that through its thinning and backside processing followed by a
collaborative efforts, the cost of ownership (CoO) for a TSV line debonding process of the completed wafer with an
with capacity of 10,000 wafers per month is now achievable at optional film frame mount
December 2008 / January 2009 www.euroasiasemiconductor.com
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