Manufacturing
reference 35nm MOSFET and, in particular, to
keep the channel doping concentration at the
interface as low as possible. Figure 5 shows the
structure of the scaled devices.
Figure 6 compares the channel length
dependence on the threshold voltage standard
deviation introduced by random dopants, line
edge roughness and poly-Si grain boundaries
with Fermi level pinning. The average size of the
polysilicon grains was kept at 40nm for all
channel lengths. Two scenarios for the
magnitude of LER were considered in the
simulations. In the first scenario the LER values
Table 1: Standard variability has to be taken into account. Good decrease with the reduction of the channel
deviation of the agreement has been obtained assuming that the length following the prescriptions of the ITRS. In
threshold voltage Fermi level at the n-type poly-Si gate grain this case the dominant source of variability at all
introduced by boundaries is pinned in the upper half of the channel lengths are the random discrete
individual and bandgap at approximately 0.35 eV below the dopants. The variability introduced by the
combined sources of conduction band of silicon. However, in the p- polysilicon granularity is similar to that
statistical variability channel MOSFET case the combined effect of introduced by random discrete dopants for the
just the RDD and LER is sufficient to reproduce 35nm and 25nm MOSFETs, but at shorter
accurately the experimental measurements. The channel lengths the random dopants take over.
reason for this is the presence of acceptor type The combined effect of the three sources of
interface states in the upper half of the bandgap variability is also shown in the same figure. In the
which pin the Fermi level in the case of n-type second scenario LER remains constant and equal
32
poly-Si and the absence of corresponding donor to its current value of approximately 4nm the
type interface states in the lower part of the results for the 35nm and the 25nm MOSFETs are
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bandgap which leaves the Fermi level unpinned very similar to the results with scaled LER but
.eur in the case of p-type poly-Si. below 25nm channel length LER rapidly
oasiasemiconductor
becomes the dominant source of variability.
Foreseeing the future Figure 7 is analogous to Figure 6 exploring
In order to foresee the expected magnitude of the scenario when the oxide thickness, which is
statistical variability in the future we have difficult to scale further even with the
studied the impact of RDD, LER and PSG on introduction of high-k gate stack will remain
MOSFETs with gate lengths 35nm, 25nm, 18nm, unchanged in the next few technology
.com
Fig. 5: Examples of 13nm and 9nm physical gate length. We also generations. This will lead to an explosion in the
realistic conventional compared the results with the statistical threshold voltage variability for bulk MOSFETs
MOSFETs scaled from variability introduced in the same devices by with physical channel length below 25nm.
square4
Issue II 2009
a template 35nm random discrete dopants and line edge Thin body SOI transistors tolerate very low
device according to roughness. The scaling of the simulated devices channel doping and therefore are resilient to the
the ITRS requirements is based on a 35nm MOSFET published by main source of statistical variability in bulk
for the 90nm, 65nm, Toshiba against which our simulations were MOSFETs, the RDD. At the same time very good
45nm, 32nm and carefully calibrated. The scaling closely follows electrostatic integrity and corresponding
22nm technologies, the prescriptions of the ITRS in terms of reduction of the threshold voltage sensitivity on
obtained from process equivalent oxide thickness, junction depth, channel length and drain voltage also reduces
simulation using doping and supply voltage. The intention was their susceptibility to LER induced variability.
Taurus Process also to preserve the main features of the However the introduction of high–k gate
dielectric and the corresponding relatively high
density of fixed and trapped charge (FTC)
introduces unwanted FTC variability which can
neutralise the benefits from low channel doping
and reduced short channel effects.
Figure 8 illustrates the impact of FTC with
different aerial density on the potential
distribution in 32 nm UTB SOI MOSFETS
described in details elsewhere. The simulation
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