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MicroNanoSystems News
Squeezing electron behaviour
WHEN squeezed, electrons increase While the need for large applied
their ability to move around. In pressures may seem a burden for
compounds such as semiconductors and applications, large compressive strains
electrical insulators, such squeezing can can be generated at interfacial regions
dramatically change the electrical and in EuO films by varying the mismatch in
magnetic properties. Under ambient lattice parameter with selected
pressure, Europium oxide becomes substrates.
ferromagnetic only below 69 Kelvin, By pinpointing the mechanism
limiting its applications. However, its through this research will provide a road
magnetic ordering temperature is map for manipulating the ordering
known to increase with pressure, temperatures in this and other such
reaching 200 Kelvin when squeezed by related materials. For example, through
150,000 atmospheres. The relevant strain or chemical substitutions with the
changes in electronic structure charge of electrons in new generation ultimate goal of reaching 300 Kelvin
responsible for such dramatic changes, microelectronics,” Argonne’s (room temperature).
however, remained elusive. Now researcher Narcizo Souza-Neto said. “Manipulation of strain adds a new
scientists at the U.S. Department of Using X-rays to probe the material’s dimension to the design of novel
Energy’s Argonne National Laboratory electronic structure under pressure, devices based on injection, transport,
have manipulated electron mobility and Souza-Neto and Argonne Physicist and detection of high spin-polarized
pinpointed the mechanism controlling Daniel Haskel report in the Physical currents in magnetic/semiconductor
the strength of magnetic interactions- Review Letters that localized, 100 % hybrid structures”, Haskel said.
and hence the material’s magnetic polarized Eu 4f electrons become
ordering temperature. mobile under pressure by hybridizing
“EuO is a ferromagnetic with neighboring, extended electronic
semiconductor that can carry spin states. The increased mobility enhances
Bosch chooses
14
polarized currents, which is an integral the indirect magnetic coupling between
element of future devices aimed at Eu spins resulting in a three-fold
www
etch for MEMS
manipulating both the spin and the increase in the ordering temperature.
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Lam Research Corporation has
SOI draws line in the sand
announced selection of its TCP
9400DSiE deep silicon etch system
by Robert Bosch GmbH.
THE SOI INDUSTRY CONSORTIUM has cross-section of expertise the “The Bosch name is synonymous
announced its key areas of focus for the Consortium can leverage,” says Horacio in the industry with deep silicon etch
.com
current year: IP, low power, and the Mendez, Executive Director of the SOI technology, so we are extremely
fabless community. These three pillars Industry Consortium. “By focusing on IP, pleased our TCP 9400DSiE etch
form the foundation upon which they low power and the fabless community, system has been qualified by Bosch,”
square4
Issue II 2009
will orient both internal resources and the SOI Consortium is providing the said Marshall Benham, MEMS
external outreach. The consortium will most value both for our members and product line head at Lam Research.
identify and close any remaining gaps in the industry at large.” The TCP 9400DSiE system is
SOI-specific design IP, further promote A joint survey with the Consortium based on Lam’s TCP 9400 silicon
the low-power advantages of SOI, and and the GSA indicated that low power etch series. The system’s TCP plasma
reach out to educate designers, is the primary driver for designers source provides a configuration to
particularly in the fabless community. considering SOI-based solutions. Within meet the challenges of silicon deep
“Despite the uncertainty of the the consortium a dedicated IP reactive ion etch, offering broad
global economy, we are looking at committee has been actively working to process capability and flexibility for a
significant market opportunities and close the remaining IP gaps, thereby wide range of MEMS, advanced
expansion for SOI. Those that can play facilitating mainstream SOI adoption. packaging, and power
the innovation card this year will be the Collaboration between various partners semiconductor applications.
ones ready with the right new products will demonstrate the performance of Optimized source and chamber
and technologies when the global most common IP on SOI and solidify hardware deliver excellent profile
economy resumes its upward course. I the ecosystem around the foundries. control, cross-wafer symmetry, and
recently visited many companies in the The technology enablement team repeatability, which are important for
US, Japan and Europe, who are complements these efforts by ensuring high yield in MEMS devices.
expressing keen interest in the broad accelerating ecosystem collaboration.
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