PHOTOVOLTAICS Semiconductor India
Next, an antireflection coating (ARC,
mostly silicon nitride) is applied to the front
side of the solar cell to increase the amount
of light coupled into the solar cell. This
ARC layer also has a surface passivation
preventing carrier recombination at the
surface of the solar cell. To further reduce
the reflective losses, the front surface of the
solar cell is usually textured prior to any
process step to provide multiple chances of
light rays to be coupled in to the cell.
Next, the metal contacts are realised. At the
backside, a full area metal contact is made,
typically by screen printing a metal paste
(aluminium ). At the front side, a grid like
metal contact is screen printed using a metal
paste (silver). The contacts are briefly Ultra-thin crystalline silicon foil
thermally annealed, to sinter the contacts
and to enable the front contacts to etch
through the ARC. Finally, the solar cells solar cells. The ‘i’ stands for ‘industrial’ and because the stress induced by aluminium
are interconnected by metal ribbons and refers to the fact that, in contrast to the alloying is only local. IMEC is now in the
assembled into modules or ‘solar panels’. PERC concept, this process is based on process of licensing this process to solar
industrially applicable techniques. The i- cell manufacturers.
As wafers get thinner, the traditional solar PERC process differs from the standard
cell process as mentioned above encounters process because the aluminium is no longer Large area i-PERC solar cell
some problems. One of these problems is deposited directly onto the back of the The PERL (passivated emitter, rear locally
related to the alloying of aluminium on the silicon. Instead, a SiO
2
/SiN dielectric layer diffused) concept again is known for
complete rear surface. The alloying process is deposited using a low temperature laboratory type, small area, high efficiency
and the thermal mismatch between silicon deposition technique, subsequently laser solar cells. It is related to the PERC
and aluminium give rise to an extended perforated and finally screen printed with concept, but features boron doped local
stress field, causing substantial wafer aluminium which is fired to form local areas at the rear side. Because of the lack of
bowing. Another problem is carrier back surface field (BSF) contacts through minority carriers in the diffusion areas, the
recombination at the rear surface. The the perforations. In this way, a large part of recombination rate at the rear contact
region at the rear, which is highly doped the silicon is isolated from the aluminium surface is dropped further more. It has been
with aluminium provides only moderate which reduces rear surface recombination shown that small area crystalline silicon
surface passivation. For very thin cells, the and thus increases the short circuit current solar cells made under laboratory conditions
recombination phenomenon at the rear and the open circuit voltage. The i-PERC can reach 1 sun efficiencies up to nearly
surface gains in importance, causing losses rear structure also improves light 25% by using the PERL concept. This
in both short circuit current density and confinement as it is more reflective than performance is not far from the maximum
open circuit voltage. Aluminium BSF at infrared wavelengths (26%) using realistic assumptions for bulk
beyond 1,000nm. At 1,100nm, the rear lifetimes and surface passivation.
The i-PERC solar cell concept aims to reflectance is 64 per cent with Al BSF,
circumvent these problems with thin wafer compared with 91 per cent for i-PERC. This The challenge that IMEC is taking on is to
manufacturing of solar cells, IMEC represents a net gain of four per cent in develop a process flow for large area PERC
developed the i-PERC process. The PERC overall efficiency. Moreover, the bowing cells with industrially applicable techniques
(passivated emitter and rear cells) concept is problem is totally eliminated with i-PERC which nowadays are often only used in an
known for laboratory type high efficiency solar cells, even for wafers as thin as 80µm, advanced microelectronic or packaging.
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www.semiconductor-india.com | Autumn 2008
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