Overlapped package structures—another option for space savings
Title
Joe Fjelstad
“Three-dimensional interconnection solutions, as has been pointed out in this space more than
once before, are really not all that new.”
Overlapped package
structures—another option
for space savings
Three dimensional interconnection of ence today, more than 20 years later, is that
electronic assemblies is a topic very much third-dimension interconnection has been
at center stage presently, as the electronic mainstreamed, and it is now viewed as an
packaging community struggles to continue out-of-the gate objective rather than a way to
to deliver the long-standing market demand “pull the bacon out of the fire.”
for smaller, lighter, faster, cheaper and bet- In the spirit of this new paradigm, all
ter electronics. Looking back, it is nothing manner of new solutions are coming to the
short of amazing how the industry has fore. One of prospective value involves the
continued to deliver on that promise for so placement of component over component
long. 3D assembly is the latest in a long list rather than specifically on one. This ap-
of technological advances that have made proach can yield reduction in board space
delivery of the promise possible. Inevitably, requirements at the potential sacrifice of a
the question will be asked: ‘Where can we certain amount of vertical clearance. The
possibly go from here?’ The fact is that in technique was developed specifically for the
some circles that question is already being solderless assembly method that has come to
raised; however, it might be a bit premature
Figure 1. Overlapped package structures shown in
be known as the Occam process, but it has
to do so, for in reality the movement to cross section and contact surface views can be cre- carry-over benefits in the world of tradi-
third-dimension thinking has just begun, ated in a variety of ways, as can be seen here, and tional assembly as well. Figure 1 illustrates
and it is a vein of technology that appears so
will provide a new option for board space savings.
some of the prospective structures that are
rich in possibilities and opportunity that the
Metal plating or caps shown on the packages on
possible. The result is improved density of
interconnection and packaging community
the left can help shield the assembly from EMI and
electrical components in a circuit assembly
will likely spend many years to come explor-
improve thermal dissipation.
by overlapping various components. While
ing the myriad possibilities that come in a it might be possible to meet the objectives
3D environment.
package surface mounted on the top of the
using traditional soldering processes, there
Three-dimensional interconnection
first package. Both package substrates were
is significant challenge in doing so. As
solutions, as has been pointed out in this
fabricated using printed circuit manufactur-
can be seen in Figure 1, the pretested and
space more than once before, are really
ing technologies and included blind, buried
burned-in components are encapsulated in
not all that new. Chip on chip, package on
and through-hole vias. The effort was driven
an insulating material and thus are held in
package, back side access of silicon chip
by the need to create an alternative solution
alignment. The assembly can be provided
terminations have all been employed in the
to an original project that was also a package
with a metal cap can for EMI shielding and
past with some early solutions going back
on package solution that, while it worked
thermal dissipation if desired and may also
more than 20 to 26 years. Then as now, the
flawlessly and could meet form and function
help limit ESD risks.
objective was to get more function into less
requirements, unfortunately did not fit in
Stacked and overlapped component
space. One project in the mid 1980s headed
the application. The vertical dimension was
assembly can also be accomplished by simply
by a long time friend, John Goodrich, then
the problem. The entire redesign project was
adhesively bonding devices to one another.
a design engineer at a well-known semicon-
completed in a little over three weeks, and
For lead-frame variations, the encapsulant
ductor manufacturer, is representative of
it saved this company a substantial contract
also prevents the leads from damage, thus
some early efforts. The project involved the
with a major automobile company. No
allowing for easier test and greater process.
rapid design, manufacture and assembly of
doubt this is but one example among many
The use of packaged devices that are tested
a top and bottom cavity, two-die castellated
that could be pointed to by other developers
and burned in should obviate many of
package with a separate custom UV-EPROM
in the IC packaging industry. The differ-
Continued on page 6
4 – Global SMT & Packaging – September 2008 www.globalsmt.net
Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44  |  Page 45  |  Page 46  |  Page 47  |  Page 48  |  Page 49  |  Page 50  |  Page 51  |  Page 52  |  Page 53  |  Page 54  |  Page 55  |  Page 56  |  Page 57  |  Page 58  |  Page 59  |  Page 60  |  Page 61  |  Page 62  |  Page 63  |  Page 64