DEPOSITION
21
The best mixture and the best working parameters were
selected calculating three L9-Taguchi matrixes; the best mixture
has been identified with the following composition: 10% Ar/ 70%
N
2
/ 20%F
2
.
In order to investigate the etching gas performance (etching
rate and etching non uniformity), SiO
2
and Si
3
N
4
layers were
used. For this purpose, blank 200mm Si wafers have been
deposited with a 1µm thick oxide layer (silane based PECVD);
additionally, Si wafers have been deposited with a 550 nm thick
Si
3
N
4
film.
Figure 2a/b: Taguchi-L9 design of experiment of Si3N4 etch As a complementary part of this work, the etch rate of the
rate [nm/min] and etch non uniformity [% 1sigma] of selected F
2
mixture on amorphous Silicon (a-Si) has been
Ar/N2/F2 gas mixture as a function of Ar-flow and pressure. measured. A layer of 300nm (the maximum allowed by this
equipment) of a-Si has been deposited on a layer of 100nm of
SiO
2
, which is the necessary substrate for thickness
measurements.
The evaluation of the F
2
gas mixtures was performed in an In order to compare the etch performance of Ar/N
2
/F
2
on
Applied Materials PECVD reactor on a P5000 main frame. SiO
2
and Si
3
N
4
, respectively, tests on standard CVD cleaning
Wafer size for all experiments was 200mm. The F
2
containing gases, like NF
3
, CF
4
and C
2
F
6
/O
2
, were done. The CF
4
based
gas bottle has been installed inside a gas cabinet close to the BKM chamber cleaning gas is recommended by Applied
CVD reactor. For the safe, clean and dry handling of the fluorine
gases, a 3 way purging unit is part of the gas supply.
The gas line was connected in form of a T connection to the
existing standard CF
4
gas line, which is used as the standard
Applied Materials chamber cleaning gas for this reactor.
For the precise gas flow control a metal sealed MFC has been
applied. Two F
2
resistant O-rings (Isolast 9675) from Trelleborg
Sealing Solution Germany GmbH have been installed. One for
the chamber lid outer seal and one for the gas feed through.
According to the Solvay procedure regarding safety and
stainless steel passivation with F
2
, a Helium leak test as well as
a vacuum leak check for the relevant gas line has been done.
N
2
F
2
gas was then flown for > 10 hours, in order to passivate
the stainless steel surface.
Based on a former evaluation by Solvay, as well as on
experiences from Applied Materials BKM (Best Known Method) Figure 4: Repeatability (within wafer and wafer to wafer)
recipes, the first plasma ignition of N
2
/F
2
gas could be achieved runs of SiO
2
etching rate [nm/min] of Ar/N
2
/F
2
for 30 sec. as
immediately. a function of wafer position (total of 25 wafers)
Materials. A further L9-Taguchi matrix has been evaluated to
define the best recipe valid for NF
3
.
Three repeatability runs with the selected
10%Ar/70%N
2
/20%F
2
mixture have been performed by using a
batch of 25 wafers per run. The wafers in slot 1, 12 and 25 have
been monitored for particle contamination. The particle
performance behaviour of the cleaning gas mixture was
measured on particle monitor wafers by a Tencor Surfscan 6400.
The minimal particle size measured was 0.25µm.
Results
The first plasma ignition of the F
2
/N
2
mixture could be achieved
without observing arcing or other unknown effects, with the
Figure 3: Repeatability (wafer to wafer) runs of 1µm SiO
2
following parameters: Chamber pressure: 5 Torr; N
2
/F
2
gas flow
deposition for 35 sec, followed by an Ar/N
2
/F
2
chamber rate of 1 slm, temperature of 400
O
C and 570 mils spacing. The
clean etching for 60 sec (run 2). The graph displays the effects of the parameter variation on the performance of the
oxide deposition thickness (lozenge6) [nm/min] and oxide F
2
/N
2
plasma were evaluated through a first L-9 Taguchi matrix
deposition non uniformity (square6) [% 1sigm] as a function of on SiO
2
. As it can be seen in figure 1, there is a significant
wafer position (total 25 wafers). The particle monitor wafers correspondence between the gas flow and the chamber pressure
(P) are located at the wafer position 1, 12 and 25 to the achievable etch rate. The increase of the etch non
August 2008 www.euroasiasemiconductor.com
Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44