News & McLean vFinal DR 2/3/10 16:35 Page 9
Analysis
Top ten account for 66% of CapEx
ACCORDING to a report from IC
Insights the top 10 semiconductor
industry capital spenders are forecast to
represent two-thirds of the total outlays
this year. The 66% share this year would
be 11 points higher than the 55% share
they held in 2005.
Some brief comments on the top
four companies’ spending plans for
2010 are shown below.
Samsung: After ranking as the
second largest spender in 2009, the
company is likely to be the largest
Issue I 2010
spender in 2010. Samsung has released
square4
conservative guidance for its capital
.com
spending plans this year ($4.7 billion for
memory) and it would not be surprising TSMC: Spurred by the challenge overcapacity history of the memory
to see the company’s total 2010 capital from the upstart GlobalFoundries, the market (which drove it out of the DRAM
outlays at $6 billion or more! world’s largest foundry is ramping up its segment). Look for the company to be
Intel: Intel is in no rush to add capital spending plans. As shown, aggressive but not overly so.
significant capacity. Considering the TSMC is planning a 79% increase in Although many companies are
company holds about 85% of the total capital outlays this year. The $4.8 billion planning to more than double their
oasiasemiconductor
MPU market, it knows how much is dollar budget for 2010 is the highest capital outlays this year, IC Insights
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needed and will not overspend. Expect level of spending by TSMC since 2000! believes that they will not be able to
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MPUs to remain relatively scarce this Toshiba: Flash memory demand is prevent rising IC ASPs and shortages
year as Intel (and AMD) would like to booming. However, Toshiba is very from occurring (especially during the
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enjoy firming ASPs for awhile longer. sensitive to the overspending/ second half of this year).
3D architecture to create new devices
TABULA, a privately held fabless same logic gates and wires over and
semiconductor company developing 3- over again for different purposes.”
D Programmable Logic Devices (3PLD), A Spacetime device reconfigures
has introduced Spacetime, a on the fly at multi-GHz rates, executing
programmable logic architecture that each portion of a design in an defined
uses time as a third dimension to sequence of steps. Although
deliver capability and affordability. manufactured using a standard CMOS
Tabula achieves this breakthrough by process, Spacetime uses this ultra-rapid
combining the Spacetime hardware that reconfiguration to make Time a third
dynamically reconfigures logic, memory, dimension, resulting in a 3-D device
and interconnect at multi-GHz rates with multiple layers or folds in which
with the Spacetime compiler that Tabula has over 80 patents granted computation and signal transmission
manages this ultra-rapid reconfiguration around the Spacetime architecture with can occur.
transparently. over 70 more pending. Tabula is Each fold performs a portion of the
“The key to Spacetime and its developing a family of general-purpose desired function and stores the result in
advantages is resolving the interconnect 3PLD devices that are based on the place. When some or all of a fold is
problem intrinsic to FPGAs,” said Steve Spacetime architecture. reconfigured, it uses the locally stored
Teig, Tabula’s President and CTO. “Tabula’s Spacetime technology is a data to perform the next portion of the
“Almost 90% of the core area of FPGAs real innovation, not just hype,” said Tom function. By rapidly reconfiguring to
is devoted to the implementation and R. Halfhill, senior analyst for In-Stat’s execute different portions of each
control of interconnect. Besides driving Microprocessor Report. “By rapidly function, a 3-D Spacetime device can
up die size and product cost, the long reconfiguring their programmable-logic implement a complex design using only
connections also limit performance and fabric — up to 1.6 billion times per a small fraction of the resources that
make timing closure more difficult.” second — Tabula’s chips can use the would be required by an 2-D FPGA.
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