Planarisation
Removing CMP roughness
Many recent processes in CMP now require a pre-CMP stage to remove bulk
material from the top layer before the final CMP process takes place.
James J. McAneny, Mark Kennedy and Mark Munley of Logitech investigated
the effects of different precision lapping processes for metal and non-metal
surfaces on the final CMP process.
A set of 100mm diameter Silicon substrates
were used to obtain process data from each
method. The quantitative data consisted of:
22
W
ith the range of
CMP applications
growing steadily
the current
processes ring6 The surface roughness as Ra and rms
available to remove uniform layers from device values taken pre and post processing.
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wafers can often fall short of the specification Measured by an AFM (Atomic Force
.eur when applied to some of the more diverse Microscope) (Windsor Scientific, UK)
oasiasemiconductor
emerging requirements. A couple of recent and a surface profilometer (Veeco, UK)
examples have been used to demonstrate the producing a 3D map of the surface
effects of pre-CMP thinning on the local and topography
global uniformity of the wafer surface ring6 Material removal and removal rates,
compared to using only CMP processes. measured and extrapolated from a
Measurements of the key parameters were Logitech electronic thickness
.com
made to review the related effect of this measurement gauge system
additional process step and its overall ring6 Surface flatness using laser
significance to the result. interferometry by capturing the images
square4
Issue III 2009
from a Logitech grazing incidence
Methodology interferometer and calculating the
An R&D scale, bench top lapping and polishing curvature of the wafer surface
Figure 1 shows the system was utilised in conjunction with a
PP6 lapping and 100mm CMP tool (both supplied by Logitech
polishing jig with UK) to run consecutive and comparative
wafer mounted by processes to establish what differences if any
vacuum for processing could be measured between each method.
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