Business
to program the selection during test. Changing
the codes for each silicon spin gives revision
control too. For example, medical, automotive,
industrial, military or aerospace manufacturers
may have qualified a specific revision and cannot
accept alternatives. The DesignTag can be
detected in working chips without making
electrical contact and is particularly beneficial for
ball grid arrays where the top of the package is
far more accessible than the electrical
connections. It provides a positive identification
to verify consistency with the device markings or
a mismatch provides justification for rejection. A
chip outputting no signals or a wrong speed or
screening option is counterfeit.
No additional package pins are required, so
DesignTag can be added to existing products
without changing their pin-out.
Another twist is to have an embedded
system interact with DesignTag so that it flags
32
Detecting thermal Obviously, if devices from another vendor are fault or status conditions. Here the tag outputs
signals with a substituted, the lost revenue rockets to $50M. a different code to unobtrusively signal an
www
thermocouple It is easy for a fraudster to increase the internal condition such as an overflow or a
.eur value of a component by remarking the package memory error, but without interrupting system
oasiasemiconductor
and falsifying the paperwork to make the functionality.
devices appear legitimate. There are
companies
5
that specialise in detecting So how does it work?
counterfeit semiconductors, but the service DesignTag is a digital core with a unique code
comes at a price and is positioned for military “signature” that can be identified externally
and space customers. without needing to read registers, X-ray or
.com
The problem is how to detect the fraud or decapsulate the chip. The design does not
prove the authenticity of the devices. Some require any antenna or special features that
vendors encode their parts with ID that can be could be easily recognised on the die and it
square4
Issue I 2009
read back through, say, the Joint Test Action does not rely on undocumented Physical
Group (JTAG) IEEE Standard 1149.1 port. Unclonable Functions (PUF). It works by
However, many parts are pin limited and do not modulating the power dissipation of the host
have a JTAG port. This is where DesignTag can device in a predefined way. Tiny heat pulses
help. It does not require any package pins, yet propagate through the chip package with low
allows customers to identify the mask set used attenuation. The level of the power “surge” is
for manufacturing the device. There is a strong selected to provide a package temperature rise
parallel with the concept of marking valuables of around 0.1 degrees C. To give an example, a
with your Post Code or Zip code using UV pens. chip with a power consumption of 150mW
It cannot prevent the fraud, but allows detection would have an additional dissipation of 5mW.
of those devices to be established afterwards. So the signal is deep below the noise floor.
The core outputs 64-bit codes for a set
DesignTag provides proof period following power on and then adopts a
of counterfeiting quiescent state. This has two effects. Firstly it
A refinement on this scheme is to provide speed eliminates the small incremental power
grade, screening or RoHS identification. This consumption, and secondly it also makes
requires non-volatile memory used in detection by a fraudster more difficult as power
conjunction with the DesignTag, and the ability has to be cycled for so-called replay attacks.
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