Design
new ASIC design starts are continuing to decline FPGA based designs. Since the introduction of
from about 11,000 in 1997 and have fallen over FPGAs, tools for FPGA development have
10 times! However, this is not be interpreted as undergone radical changes.
FPGAs having overtaken the ASIC market! There One can confidently say that the ‘frontend’
is still lot of room out there! design methodology is common across FPGAs
and ASICs and is predominantly HDL based. The
Technology similarity extends to the design verification
FPGAs have Logic Elements (LEs) as their basic methodologies too. Differences start becoming
building blocks. LEs have a 4 – 6 input Look Up significant in the ‘backend’ part of the design.
Table (LUT), a register and basic control circuitry. FPGAs use custom place & route engines from
Today’s state of the art FPGAs have more than respective vendors. Unlike the ASICs, there is no
300,000 LEs, a large chunk of embedded need for a Design for Testability (DfT) and a scan
Issue I 2009
memory, on chip processors, DSP elements, PLL, insertion phase for the FPGAs. They are
square4
high speed IO, special IO and a whole lot of extensively tested during manufacturing and also
.com
‘switches’ that help in interconnectivity. They are have inbuilt scan logic. The designers need to
extremely complex devices, with gate focus only on the testing of the actual design
equivalents running to several millions of gates functionality of the device.
that offer enormous flexibility to the designers. FPGA development tools are closely tied to
Technology has also driven the speeds of FPGAs the hardware developers today. Increasingly,
to over 500 MHz. FPGAs are built with the latest FPGAs are being considered by engineers
semiconductor technologies and are usually the beyond the hardware and digital realm. Software
oasiasemiconductor
first ones to move to latest process technology developers, embedded programmers, DSP
.eur
nodes. The latest FPGAs are built using 40 nm algorithm developers and even mechanical
www
technology node. engineers and biologists have begun to design
This has helped in narrowing down the gaps with FPGAs.
25
with traditional ASICs in terms of speed, die size, These expanding communities of engineers
yield etc, and become comparable in terms of beyond the hardware domain do not have any
cost. Foundries are traditionally in love with knowledge in specific hardware design
FPGAs since these devices are typically large, approaches and require tools to be specifically
have logic, memory and complex IO and have tailored for their needs.
regular structures. Foundries use FPGAs as Fortunately, they have not been left out and
process drivers and to identify and eliminate any tools that enable them to use FPGAs effectively
systematic process issues. Because of the are making their way into the market. For
bleeding edge technologies involved in creating example, multiple vendors offer “C to
these devices, FPGA houses will have to be at Hardware” tools today, specifically targeting the Figure 1. Rising cost
the forefront of silicon expertise and should be FPGA designers. of First Silicon
in a position to work with fabs very closely. In
addition, being a programmable device with a
large number of IOs, they need to employ the
latest techniques in package design and address
such constraints as heat dissipation, easy
adaptability at the PCB/system level etc, right at
the architecture stage.
Tools and Methodology
As noted earlier, FPGA complexities have
approached that of ASICs. Designers are unlikely
to be motivated to learn a new methodology for
migrating to FPGAs and would prefer to use
similar tools that they have traditionally been
using for ASIC designs. Fortunately, due to the
increased complexity and adoption, EDA
vendors have looked at the FPGA segment
positively. They have enabled the same tools
that the designers are generally familiar with, for
Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44