Inspection
New eyes for advanced processes
As the semiconductor industry moves to sub-45nm nodes, non-visual defects
(NVDs) such as organic and metallic residues and process-induced charging are
Issue VI 2009
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becoming more of a problem in all areas of the industry, from wafer makers to
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logic and memory IC fabs. This is due to more stringent surface quality
requirements necessary to support new structures and materials. Ralph Spicer,
VP of Marketing at Qcept Technologies discusses how NVD inspection is
providing new “eyes” that allow faster detection and resolution of NVD-related
oasiasemiconductor
yield loss mechanisms.
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emiconductor process innovation is
shifting dramatically. Whereas in the
past, performance improvements were driven by
physical shrinks (e.g. lithography dimensions and
film thicknesses), improvements at the sub-45nm
nodes are increasingly driven by materials
innovation (e.g. high-k/metal gates, dual work-
function materials, low-k dielectrics and silicon-
on-insulator (SOI)) and process innovation (e.g.
single wafer wet cleans, edge/backside cleans
and atomic layer deposition, all of which lead to
tighter process windows). Surface properties of
these materials are increasingly crucial to their
performance, driving more wafer cleaning and
surface preparation steps in the manufacturing
process. This, in turn, is giving rise to Non-Visual Many NVDs result from sub-optimal cleaning Figure 1: The SPDI
Defects (NVDs). and surface preparation, as well as handlers, method senses
NVDs cause changes to the electrical or chucks, carriers and other cross-contamination changes in work
chemical properties of the wafer surface that can sources. function to detect
lead to poor adhesion of subsequent layers, NVDs include: NVDs on the wafer
degraded device parametrics or long-term ring6 Organic contamination, such as surface.
reliability issues. The International Technology incomplete resist stripping
Roadmap for Semiconductors (ITRS) cites the ring6 Metallic contamination, such as
increasing importance of NVDs to yield, and the Cu contamination of a bath, or metallic
need for new NVD inspection techniques at cross-contamination from wafer carriers
advanced design nodes
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. and handlers
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