1/3VerticalBleedBGA 8/28/08 1:41 PM Page 1
Can lead-free and lead-containing PCBs be cleaned in a single process?
Table 1. Post-wash spectrum, 2.5 ft/minute vs. 1.2 ft/minute
Lb-free boards Temp Exposure time Measured Pb content (mg/cm
2
)
(˚C) (sec) Top Middle Bottom
Glenbrook
1 50 120 0 0.180 0
2 50 260 0.115 0 0 X-ray Systems
3 60 120 0.212 0.124 0.115
4 60 260 0 0.196 0.098
for
5 70 120 0.94 0.108 0.202
BGA
6 70 260 0.205 0.120 0
Inspection
product throughputs. Surface analysis and √ Optimal rinsing can provide
documentation of lead levels was provided reliable RoHS compliance by
by XRF analysis. As part of this examina- eliminating ionic (lead containing)
tion, no lead contamination was found contamination.
which exceeded the 0.1% limit set forth by
RoHS and WEEE.
As a result, such a mixed process turns Stefan Strixner, Dipl.-Ing, graduated in
out to be indeed practicable. chemical engineering at the University of
Applied Sciences (UAS) Nürnberg, Germany.
√ Using modern cleaning technolo-
He is a senior process engineer in application
gies, a mixed process is feasible
technology for ZESTRON Europe, Ingolstadt,
without exceeding RoHS and
Germany, where he has worked since 1992. Mr.
WEEE limitations for lead-free.
Strixner is the author of numerous technical
√ Among the cleaning agents tested,
articles and frequently holds seminars and
the levels of dissolved lead were
tutorials on cleaning and its reliability aspects.
lower than 10 mg/liter.
“Sober outlook . . . not a big surprise”—continued from page 27
• China is expected to account for 36% expected to grow to $5 billion next
of the overall worldwide semiconduc- year.—ABI Research
tor usage in 2012 from 32.7% in
Affordable
2007.—Gartner Walt Custer is an independent consultant who
• Global nanomaterial market for
monitors and offers a daily news service and
Portable
electronics applications is projected
market reports on the PCB and assembly auto-
to reach $600 million in 2008 and
mation and semiconductor industries. He can be
contacted at
walt@custerconsulting.com or visit
Rentable
grow at a CAGR of more than 40% to
reach nearly $7 billion in 2015.—The
www.custerconsulting.com.
Information Network
Jon Custer-Topai is vice president of Custer
• India global semiconductor design
Consulting Group and responsible for the corpora-
will account for nearly 25% of services
tion’s market research and news analysis activi-
revenues in 2008, with $1.7 billion.—
ties. Jon is a member of the IPC and active in the
Gartner
Technology Marketing Research Council. He can
• Intel Nehalem CPUs expected to boost
be contacted at
jon@custerconsulting.com.
FC substrate demand; NTK, NPC,
Ibiden and Shinko began certifying
their products and expect shipments to
To learn more go to
begin 1Q’09.
• Vietnam semiconductor revenues are
www.GlenbrookTech.com
expected to grow from $1 billion in
2007 to $6.6 billion in 2012, a 46.8%
CAGR, which is mainly driven by
increased electronics investments from
EMS companies Hon Hai, Compal,
and Quanta.—Gartner
• Touch screens in mobile devices are
11 Emery Avenue
Randolph, NJ 07869, USA
800-600-8866
www.globalsmt.net Global SMT & Packaging – November 2008 – 31
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