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SMART Group launches “Lead-Free Process Defect Guide 2”
Real-Time X-ray Inspection
Incomplete solder coverage
for Quality Control and
Lead-free wave soldering often results in
Process Development ...
solder joints with reduced hole fill. This
can be related to the process parameters,
Glenbrook’s
the solder finish on the surface of the
printed board or the flux type. Each
step needs to be examined to pinpoint
the actual cause. Due to the increased
temperatures of lead-free processes, the
design on multilayer boards can have a
great influence on the solder, causing
it to solidify prematurely due to heat JewelBox 70-T

loss on the inner layer connections.

80 kV
Figure 3. Three joints on a demonstration

Wherever possible the inner layer
10 micron focal spot
package, with one open connection.

Up to 2000x
ground or earth plane connection should
magnification
be modified, increasing the clearance

5-axis minipulator
Open joint on POP package between the holes and the inner layer,
allows tilt & 360º
rotation
‘POP package’ refers to package-on-package reducing the number of connections or
assembly or stack where two or more ball reducing the track connection width.
JewelBox 90-T

grid array (BGA) or chip scale package The two example joints in Figure 4 show

90 kV
(CSP) components are placed on top of incomplete solder coverage on the top

5 micron focal spot

Up to 2000x
each other and reflow soldered together. surface of the board; however both easily
magnification
One of the main reasons for open solder exceed the minimum requirements of �
5-axis minipulator
connections is package-to-package warp. the IPC610 level 3 and should not
allows tilt & 360º
This can lead to one or multiple open be reworked.
rotation
connections, which are very difficult to
detect during component manufacture or
assembly. Figure 3 shows three joints on
a demonstration package with one open
connection. Normally this type of defect
is easily detected during x-ray, but with
multiple balls on top of each other, it
The GTI-5000

is challenging.
Image Processing
Software

Standard with
any
JewelBox

Easy to use

Fast and accurate
testing routines

Fully networkable
Figure 5. Poor solderability can be caused by
a lack of protective coating.
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Solderability failure on LGA
w
or
ld
.
Quad flat no lead (QFN) and land grid
array (LGA) packages often do not have
solderable side terminations, or they are
poorly solderable due to the component
manufacturing process. There is not
requirement for the side terminations to be
solderable based on IPC 610 requirements;
however it is often the case that customers
like to see a joint and it makes automatic
optical inspection (AOI) possible. Poor
solderability of the edge termination is
normally caused by a lack of a protective
coating, like tin on the surface of the
JewelBox 70-T

copper lead frame or resin smearing during
component singulation. Solderability is
best tested using a wetting balance or in
production with paste and a glass slide to
Figure 4. Two examples of incomplete solder
simulate reflow.
coverage related to lead-free wave soldering.
11Emery Ave., Randolph, NJ 07869 USA
Tel:973-361-8866 • Fax:973-361-9286
Toll Free: 800-600-8866
www.globalsmt.net Global SMT & Packaging - August 2008 – 7
www.GlenbrookTech.com
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